FPGA Virtual Lab

• Laboratórium
• Demonštračné projekty
  • Základné
    • Kombinačná Logika
    • Dekódery
    • Klopné Obvody
    • Čítače
    • Konečné automaty
    • Aritmetika - MAC
  • Pokročilé
    • Altera NIOS II
    • Actel ARM7
    • FIR Filter
• EDA nástroje
  • Altera
  • Actel
  • Xilinx
  • ModelSim
• Vývojové dosky
  • Altera CPLD Kit
  • Altera Cyclone II DSP
  • Altera Cyclone III NIOS
  • Xilinx Spartan 3E Starter Kit
  • Actel Fusion System Management Board
  • Altera Stratix DSP
• Meracie prístroje
  • Tektornix MSO 4104
  • Tektronix TDS2024B
  • Anritsu MG3700A
  • Agilent 16822A
  • DELL Server
• Licensované IP funkcie
• Vzdialený prístup
• Publikované výstupy
• Zadania
• Zaujímave odkazy
• Kontakty

Publikované výstupy

V rámci riešenia čiastovných úloh pri vývoji virtuálneho FPGA laboratória alebo využitím jeho možností boli realizované a publikované nasledujúce výstupy:

[poradové číslo] [kód kategórie] referencia.

Diplomové práce

[1] [GII] LIPTAJ, M.: Implementation of IP functions in video signal processing. Diploma Work, Department of Electronics and Multimedia Communications, FEI TU Kosice, May 2009, pp.1-86 (in Slovak).

[2] [GII] KONTURA, O.: Remote control of oscilloscope across the Internet. Diploma Work, Department of Electronics and Multimedia Communications, FEI TU Kosice, May 2009, pp.1-60 (in Slovak).

[3] [GII] KALO, K.: Test Bench with Remotely Controlled Logic Analyser, Department of Electronics and Multimedia Communications, FEI TU Kosice, May 2008, pp.1-63 (in Slovak).

[4] [GII] SULIK, M.: Sequential and Combination Structures Based on Altera CPLD Circuits, Diploma Work, Department of Electronics and Multimedia Communications, FEI TU Kosice, May 2008, pp.1-83 (in Slovak).

[5] [GII] GASPAR, L.: Secured Opto-Electronic System for Product Traceability - Architecture, Design and Feasibility Study," Master's Thesis, Department of Electronics and Multimedia Communications, FEI TU Kosice, May 2009, pp.1-76.

Články v zborníkoch konferencií

[6] [AFC] GASPAR, L. - DRUTAROVSKY, M. - FISCHER, V. - BOCHARD, N.. : Efficient AES S-boxes implementation for non-volatile FPGAS. In: FPL 09 : 19th Interantional Conference on Field Programmable Logic and Applications : Prague, Czech Republic, August 31- September 2, 2009 : Proceedings. Praha : ÚTIA AV ČR, 2009. pp. 649-653. ISBN 978-1-4244-3892-1.

[7] [AFC] DRUTAROVSKY, M. - SALIGA, J. - MICHAELI, L. - HRONCOVA, I.: Remote Laboratory for FPGA based Reconfigurable System Testing. Proceedings of the XIX IMEKO Word Congress, Fundamental and Applied Metrology, September 7-10, 2009, Lisbon, Portugal, pp. 54-58. ISBN 978-963-88410-0-1

[8] [AFC] DRUTAROVSKY, M. - VARCHOLA, M. - VANCÁK, O.: Optimized FIPS 140 statistical tests IP core embedded in flash based actel FPGA. In: 54. IWK : International scientific colloquium : Information Technology and Electrical Engineering - Devices and Systems, Materials and Technologies for the Future : 07-10 September 2009, Ilmenau University of Technology. Ilmenau : University of Technology, 2009. 5 pp. ISBN 978-3-938843-44-4.

[9] [AFC] VARCHOLA, M. - DRUTAROVSKY, M.: New FPGA based TRNG principle using transition effect with builtin malfunction detection. In: CryptArchi 2009 : 7th International Workshop on Cryptographic Architectures Embedded in Reconfigurable Devices : Prague, Czech Republic - June 24-27th 2009. Praha : CVUT, 2009. pp. 150-155.

[10] [AFC] VARCHOLA, M. - DRUTAROVSKY, M. - FOUQUET, R. - FISCHER, V.: Hardware platform for testing performance of TRNGs embedded in Actel Fusion FPGA. In: Radioelektronika 2008 : Proceedings of 18th international conference, April 24-25, 2008 Prague, Czech Republic. Praha : Czechoslovakia Section IEEE, 2008. 4 p. ISBN 978-1-4244-2088-9.

[11] [AFD] DRUTAROVSKY, M. - VARCHOLA, M.: Cryptographic system on a chip based on Actel ARM7 soft-core with embedded true random number generator. In: 2008 IEEE Design and Diagnostics of Electronic Circuits and Systems : Bratislava, Slovakia, April 16-18, 2008. Bratislava : IEEE, 2008. pp. 164-169. ISBN 978-1-4244-2276-0.

[12] [AFD] VARCHOLA, M.: Design and Evaluation of Optimized FPGA IP-Cores for Cryptography, Počítačové Archtektury & Diagnostika (PAD) 2008, September 15-17, Hejnice, Czech Republic, pp.113-118.

[13] [AFC] FISCHER, V. - BERNRD, F. - BOCHARD, N. - VARCHOLA, M.: Enhancing security of ring oscillator-based TRNG implemented in FPGA. IEEE International Conference on Field Programmable Logic and Applications (FPL), 2008, Heidelberg, Germany, pp.248-250. ISBN 978-1-4244-1961-6.

Články v časopisoch

[14] [ADF] DRUTAROVSKY, M. - SALIGA, J. - HRONCOVA, I.: Hardware infrastructure of remote laboratory for experimental testing of FPGA based complex reconfigurable systems. In: Acta Electrotechnica et Informatica. Vol. 9, No.. 1 (2009), pp.. 44-50. ISSN 1335-8243.

[15] [ADE] VARCHOLA, M. - DRUTAROVSKY, M.: Embedded Platform for Automatic Testing and Optimizing of FPGA Based Cryptographic True Random Number Generators. Submitted for publication to Radioengineering, October 2009. ISSN 1210-2512.

KEMT 2009